To enable high speed testing, the silicon chip is bonded to a printed circuit board (PCB) with low loss RF connectors. The PCB is also designed for DC bias control of MZMs and MUX/DEMUX phase tuning (see Fig. 2). In the high-speed testing, the differential RF signals from a pseudo-random bit sequence (PRBS) generator with [231-1] pattern length are amplified using a commercially available dual-output driver. The amplified single-ended output of 3.2 Vpp (6.4 Vpp differential) is combined with 2VDC using a bias Tee to ensure reverse bias operation for the entire AC voltage swing. The MZI modulators are biased at quadrature for all the high-speed measurements.
Before RF characterization, we tested the optical spectra of the integrated chip. We obtained relatively good channel uniformity (<1.5>25 dB). For the data transmission experiment, we measured the eye diagram one channel at a time. Figure 3 shows the 25 Gbps eye diagrams of all eight channels. We see from Fig. 3 that all channels show similar performance. Clear open eyes at 25 Gbps suggest that the single chip is capable of transmitting data at an aggregate bandwidth of 200 Gbps.
